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Electrical and Information Engineering

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COMPUTER ENGINEERING LABORATORY

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EXERCISE #5 - WITH HIDDEN ANSWERS

Reference tables

Basic computer instruction format

Basic computer instruction format

Basic computer instruction summary

Basic computer instruction summary

Flow chart for basic computer operation:

Flow chart for basic computer operation

Control logic in the basic computer

Basic computer control logic

Basic computer instruction set control logic and micro-operation summary

Basic computer ctrl-logic & micro-op summary

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PART 1 - Understanding instruction execution

Instruction execution 1

The content of AC in the basic computer is hexadecimal A937 and the initial value of E is 1. Determine the contents of AC, E, PC, AR and IR in hexadecimal after the execution of the CLA instruction. The initial value of PC is hexadecimal 021.

Initial conditions:
AC = A937h
E = 1
PC = 021h

Solution:

Execute CLA (Instruction code 7800h)

Fetch:
AR <- PC                       ; => (AR) = (PC) = 021h
IR <- M[AR] , PC <- PC + 1  ; => (IR)=7800h, (PC) = 022h
Decode:
D0,...,D7 <- decode IR(12-14)
AR <- IR(0-11), I <- IR(15) ; =>(AR) = 800h (12 address bits)
Execute:
AC <- 0                        ; (AC) = 0
Summary:
(AC) = 0h, (AR) = 800h, (PC) = 022h, (IR) = 7800h, E= 1

Instruction execution 2

A basic computer is starting to perform instruction ADD 100 I. Given preconditions are (values are hex decimals):

  • PC = 190
  • AC = 3
  • M[100] = 200
  • M[200] = fffe

a) Describe what happens during the instruction cycle. Include all phases from fetch to execute.

b) If an I/O device requests for an interrupt during the instruction cycle, what happens? Describe the events starting from the fetch phase of the current instruction until the machine is ready to branch to the interrupt subroutine of the I/O device.

Solution:

Before fetch, we branch to the instruction cycle (R = 0).

Fetch:
R'T0:   AR <- PC                       ; AR = PC = 190
R'T1:   IR <- M[AR] , PC <- PC + 1     ; IR = 9100, PC = 191

Decode:
R'T2:   D0,...,D7 <- decode IR(12-14)  ; D1 = 1
        AR <- IR(0-11), I <- IR(15)    ; I = 1, AR = 100

Determine whether instruction is memory reference, register or I/O. Because D1 was set to 1, all other decoder outputs Dn are set to 0 (see figure 5-6). Therefore the instruction is a memory-reference instruction.

Indirect:
D7'IT3: AR <- M[AR]                    ; AR = 200

Execute:
D1T4:   DR <- M[AR]                    ; DR = fffe
D1T5:   AC <- AC + DR,		       ; AC = 1
        E <- C(out), SC <- 0	       ; E = 1

Remember that SC (Sequence Counter) is incremented on every clock pulse Tn.

b)

Because we are already in the instruction cycle, the current instruction is performed as in a). After the execution of the instruction is completed, the computer branches to interrupt cycle (R = 1). R is the interrupt request signal.

First in the interrupt cycle, the return address of the current program is saved to memory location 0.

RT0: AR <- 0, TR <- PC
RT1: M[AR] <- TR, PC <- 0           ; M[0] = 191

The interrupts are disabled and the program flow continues at memory location 1 which contains the branch instruction to the interrupt subroutine.

RT2: PC <- PC + 1 , IEN <- 0,
     R <- 0, SC <- 0

At the beginning of the next instruction cycle (R = 0), fetching the branch instruction to the first instruction of the interrupt subroutine may begin.

Instruction execution 3

The content of PC in the basic computer is 3AF (all numbers are in hexadecimal). The content of AC is 7EC3. The content of memory at address 3AF is 932E. The content of memory at address 32E is 09AC. The content of memory at address 9AC is 8B9F.

a) What is the instruction that will be fetched and executed next?

b) Show the binary operation that will be performed in the AC when the instruction is executed

c) Give the contents of registers PC, AR, DR, AC and IR in hexadecimal and the values of E, I and the sequence counter SC in binary at the end of the instruction cycle.

Solution:

a) (PC) = 3AF => next instruction that will be fetched is 932E that is indirect ADD instruction (from table 5-2). The address of the operand is at address 32E (instruction bits 0 - 11).

b) Address of the operand is 09AC at address 32E => operand is at address 09AC => operand is 8B9F

ADD command:

DR <- M[AR]
AC <- AC + DR ; operand is in DR
E <- Cout , SC <- 0 ; E = 1 if carry out

=> (AC) = (AC) + 8B9F = 7EC3 + 8B9F
=>

  7EC3 = 0111 1110 1100 0011
+ 8B9F = 1000 1011 1001 1111
---------------------------------
       1 0000 1010 0110 0010 = 0A62 (carry discarded)

c)

(PC) = 3B0  ; 3AF + 1
(AR) = 9AC  ; Address of the last memory reference
(DR) = 8B9F ; 2'nd operand
(AC) = 0A62 ; The result of addition
(IR) = 932E ; Last instruction fetched = ADD
 E = 1      ; we had carry out
(SC) = 0    ; Cleared at the end of ADD command
 I = 1      ; indirect ADD

Control logic

Derive the control gates for...

a) the write input of the memory in the basic computer.

Click here for a correct answer


b) the load input of the Data Register (DR)

Click here for a correct answer


Hint: Use the register transfer statements for each basic computer instruction available from the basic computer instruction set control logic and micro-operation summary.

PART 2: Let's code assembly!

Warming up...

a)How do you jump unconditionally to label STR?

Solution: BUN STR

b)How do you jump to label SUB and save the return address?

Solution: BSA SUB

c)After that, how do you return from that subroutine? (i.e. how do you use the return address?)

Solution: BUN SUB I

Coding assignment - loops

Write simple loops in basic computer assembly.

a) A loop that iterates until the value of memory location denoted by symbol CND is zero

Solution:

LOP, LDA CND
SZA
BUN LOP

b) A loop that iterates 20 times. This loop doesn't need to do anything else - just loop and waste time

Solution:

TJU, -21 DEC
LOP, ISZ TJU
BUN LOP

c) A loop inside a loop. The outside loop should iterate 17 times, and the internal loop 9 times during each iteration of the outside loop. The loop doesn't need to do anything more than that.

Solution:

LC1, -18 DEC
LCV, -9 DEC
LC2, 0
LOP, LDA LCV
STA LC2
LO2, ISZ LC2
BUN LO2
ISZ LC1
BUN LOP

EXTRA CHALLENGE AT HOME 1: AtMega32 assignment

If you haven't done so yet, read the AtMega32 instruction set summary from the AtMega32 data sheet available from the course website. Write, in assembly, a loop program that should take exactly one millisecond to execute. Do not use counters this time, but only loops. The system clock has been set to run at 8MHz. HINT: next to each instruction, you see how many clock cycles a single instruction takes.

EXTRA CHALLENGE AT HOME 2: 8086 assignment

Remember the 8086 instruction set from the first exercise? Find it, and create a similar delay loop structure as in the first assignment. As the data sheet does not provide required clock cycles of each instruction, no exact requirement for amount of time is set. Just create a delay loop that loops for some arbitrary amount of cycles.

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